The present invention is directed to a comparator, and more particularly, to a high speed and power conserving comparator that is operable up to the rails of a power supply.
Typically, applications, such as switching power supplies and regulators, employ a pulse width modulator (PWM) circuit to control the ON time of a switch by comparing an error signal to a voltage ramp. In order to hold the integrity of the pulse the comparator must respond very rapidly. These pulses are used by other circuits to supply power to different types of electronic devices, e.g., mobile telephones, pagers, and personal computers.
A PWM circuit usually employs at least one comparator to create the pulses. Also, in many applications it is desirable for the comparator to operate xe2x80x9crail to railxe2x80x9d, i.e., the range of operation includes the upper and lower voltages provided by a power supply. However, in the past, high speed, rail to rail comparators have consumed relatively large amounts of power which can be undesirable in many mobile applications.
The present invention is directed to an apparatus for comparing an input signal to a reference voltage and generating relatively narrow high speed pulses as an output signal. A high comparator is employed for resolving comparisons up to a high rail of a power supply. The high comparator is used to compare the reference voltage to the input signal. A low comparator is employed for resolving comparisons down to a low rail of the power supply. The low comparator is used to compare the reference voltage to the input signal. In response to the common mode level of the input signal, a selector selects either the high comparator or the low comparator to compare the input signal to the reference voltage. The selector disables the unselected comparator; and the selected comparator generates a comparison signal.
Another embodiment of the invention is directed to at least one component that receives the comparison signal from the selected one of the high comparator and the low comparator to provide an output signal. Also, this component includes at least one logical element, including AND, OR, NAND, NOR, inverter, latch, flip-flop, and the like.
Yet another embodiment of the invention is directed to employing the selection of the high comparator to enable the input signal to be resolved substantially near the high rail of the power supply as a pulse. The pulse is operative as the comparison signal. Also, the selection of the low comparator can cause the input signal to be resolved substantially near the low rail of the power supply as a pulse that is operative as the comparison signal. Additionally, if the common mode voltage of the input signals are low, the selector selects the low comparator and disables the high comparator. Furthermore, if the common mode voltage of the input signals are high, the selector selects the high comparator and disables the low comparator.
Still another embodiment of the invention is directed to enabling the low comparator to include at least one P-channel MOSFET and the high comparator includes at least one N-channel MOSFET. Also, the selector can include at least one Schmitt trigger buffer and/or at least one comparator. Additionally, a hysteresis of the selector can be programmed.
Another embodiment of the invention is directed to reducing power consumption in an unselected one of the low comparator and the high comparator that is disabled and further configured in a standby mode. Also, the reference voltage can be a common mode voltage.